Product Summary

The 74LVC74APG is a high-performance, low-voltage Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. The 74LVC74APG is a dual positive edge triggered, D-type flip-flop with individual data (D) inputs, clock (CP) inputs, set (SD ) and (RD ) inputs; also complementary Q and Q outputs.

Parametrics

74LVC74APG absolute maximum ratings: (1)DC supply voltage, VCC: 0.5 to +6.5V; (2)DC input diode current, VI<0, IIK: 50mA; (3)DC input voltage, VI: 0.5 to +5.5V; (4)DC output diode current, VO>VCC or VO<0, IOK: 50mA; (5)DC output voltage, VO: 0.5 to V+0.5V; (6)Storage temperature range, Tstg: 65 to +150℃; (7)Power dissipation per package, PTOT: 500 mW.

Features

74LVC74APG features:(1)Wide supply voltage range of 1.2V to 3.6V; (2)In accordance with JEDEC standard no. 8-1A; (3)Inputs accept voltages up to 5.5V; (4)CMOS low power consumption; (5)Direct interface with TTL levels; (6)Output drive capability 50 transmission lines @ 85℃.

Diagrams

74LVC74APG block diagram

74LV02BQ,115
74LV02BQ,115

NXP Semiconductors

Gates (AND / NAND / OR / NOR) 3.3V QUAD 2-INPUT

Data Sheet

0-1: $0.26
1-25: $0.23
25-100: $0.20
100-250: $0.17
74LV00PW,118
74LV00PW,118

NXP Semiconductors

Gates (AND / NAND / OR / NOR) QUAD 2-INPUT NAND

Data Sheet

0-1: $0.08
1-25: $0.08
25-100: $0.08
100-250: $0.07
74LV00N,112
74LV00N,112

NXP Semiconductors

Gates (AND / NAND / OR / NOR) QUAD 2-INPUT NAND

Data Sheet

0-1: $0.13
1-25: $0.12
25-100: $0.12
100-250: $0.11
74LV00DB,118
74LV00DB,118

NXP Semiconductors

Gates (AND / NAND / OR / NOR) QUAD 2-INPUT NAND

Data Sheet

0-1: $0.22
1-25: $0.18
25-100: $0.15
100-250: $0.12
74LV00DB,112
74LV00DB,112

NXP Semiconductors

Gates (AND / NAND / OR / NOR) QUAD 2-INPUT NAND

Data Sheet

0-1: $0.22
1-25: $0.18
25-100: $0.15
100-250: $0.12
74LV00D,118
74LV00D,118

NXP Semiconductors

Gates (AND / NAND / OR / NOR) QUAD 2-INPUT NAND

Data Sheet

0-1: $0.08
1-25: $0.07
25-100: $0.07
100-250: $0.06